Intel vs TSMC: How CoWoS Packaging Constraints Could Create an Opportunity for Intel Foundry

• Taiwan Semiconductor (TSMC) is world’s dominant player in semiconductor manufacturing, holding over 70% of pure-foundry market share.
• Intel’s Foundry business is also sizeable, but nearly all of the company’s foundry demand comes from itself.
• As Intel looks to scale its external foundry sales, providing advanced packaging capacity through its EMIB-T approach could be a key path forward amid TSMC’s CoWoS constraints.

Taiwan Semiconductor (TSMC) is the single, most important company to the AI industry. However, to compete with the incumbent, Intel does not need to beat TSMC at leading-edge manufacturing. It only needs to solve a problem that TSMC may not be able to solve quickly enough.

As of Q1 2026, TSMC held approximately 73% of pure foundry market share by revenue, and an even greater share of advanced node manufacturing. Intel’s Foundry revenue, by comparison, was $5.8 billion in Q2, but nearly all of this demand came from Intel’s own chip design division. External Intel Foundry revenue was just $293 million in Q2. Compare this to TSMC’s revenue of $40.2 billion in Q2, which was over 137X higher.

The conventional thinking among investors is that Intel needs to “beat” TSMC in developing more advanced node processes to attract significant external demand. In the article below, the I/O Fund challenges this narrative by highlighting one of the AI industry’s key constraints: advanced packaging.

CoWoS Packaging vs Advanced-Node Manufacturing 

Advanced node wafer production capacity and advanced packaging capacity are largely separate processes, creating an opportunity for Intel to capture demand that TSMC may not able to meet quickly enough.

Chip dies are produced through advanced node wafer fabrication, while advanced packaging combines dies with high–bandwidth memory into finished AI accelerator designs.

TSMC’s advanced packaging method for the AI market is CoWoS (Chip-on-Wafer-on-Substrate). Epoch AI estimates that Nvidia, Google, AMD, and Amazon, the world’s four largest AI chip designers, consumed over 90% of CoWoS packaging capacity in 2025. Meanwhile, they consumed just 12% of advanced logic die production.

TSMC’s CoWoS Capacity Expansion Still Cannot Keep Up With AI Demand 

TSMC has pointed to constrained CoWoS capacity for multiple years at this point. In Q2 2023, TSMC said that it did not have a problem in supporting logic die demand, also called “front-end” demand.  However, they said “for the back end, the advanced packaging side, especially for the CoWoS, we do have some very tight capacity to — very hard to fulfill 100% of what customers needed.”

In Q3 2024, after more than doubling its CoWoS capacity versus 2023, TSMC said “our customers’ demand far exceeds our ability to supply”. In 2025, industry analysts estimate that TSMC doubled its CoWoS capacity again. Goldman Sachs estimates that CoWoS capacity will also nearly double in 2026, and that from 2025-2027, capacity will more than triple.

TSMC itself expects CoWoS capacity to rise by more than an 80% CAGR from 2022-2027—or a more than 19X increase in just five years. Despite this, TSMC CEO C.C. Wei said on its July 2026 earnings call, “our packaging capacity is so tight that now it limits my customers’ growth.”

Given that CoWoS capacity could limit AI accelerators’ growth, below we look at ways that Intel is helping to fill the gap for alternative advanced packaging solutions.

Intel EMIB-T: Why Nvidia and Google Are Exploring an Alternative to TSMC CoWoS 

EMIB (Embedded Multi-die Interconnect Bridge) is one of Intel’s advanced packaging approaches, with EMIB-T being the latest evolution. Importantly, Intel notes “EMIB-T enables designs to be converted from other packaging technologies with minimal redesign.”

In other words, customers that currently use TSMC CoWoS could design their chips to be compatible with EMIB-T packaging. This could allow for a scenario where TSMC continues to produce leading edge compute dies for customers, but offloads some of the advanced packaging to Intel’s EMIB-T.

There is a notable, yet unconfirmed report that Google has placed an order to use Intel’s advanced packaging on more than 3 million TPUs during 2028. The same report notes that Nvidia is evaluating EMIB-T for use in its Feynman-generation four-die chip design. This is largely due to design advantages over CoWoS that allow for larger chip packages with less complexity. Amazon may also be interested in using EMIB-T for its Trainium chips.

Intel Expects Billions in Advanced Packaging Revenue From EMIB-T 

Aside from reports, Intel’s CFO Dave Zinsner said in March that the company is “close to closing some deals that are in the billions of dollars per year in terms of revenue on packaging.”

Intel’s CEO Lip-Bu Tan, added to this in May saying “And we ask our customer, if you are serious to use our EMIB-T, can you help me on the substrate prepay? They jump on it. So they meant that they show the commitment, they really want our technology. And this is not a few million, it’s billions in the next few years.”

Tan is not only indicating that Intel’s EMIB-T could reach billions in revenue, but also that customers are willing to help with pre-payments on substrates, which are in a significant shortage as well. This signals that customer interest in EMIB-T is strong enough to where discussions have moved beyond initial evaluations and could be closer to qualification.

Why EMIB-T Adoption Could Be a Win-Win For TSMC, Intel and Chip Designers 

Chip designers adopting EMIB-T could be a mutually beneficial situation for not only these players, but also TSMC and Intel. TSMC’s CEO indicated this much himself on the Q2 call.

When asked about EMIB-T gaining traction, C.C. Wei said “we welcome that additional flexibility in the market. And so that will help TSMC’s front-end wafer business growth, which is a majority part of TSMC’s business. The technology looks good, according to the newspaper. And we hope they will be successful and so that share some of the loading from TSMC.”

Wei is affirming the idea that customers using Intel for advanced packaging would allow TSMC to sell more wafers. It’s rare to hear a management team discuss a competitor as the way forward. However, in this case, Intel’s packaging would not necessarily take wafer share from TSMC, rather it would allow TSMC to ship more front-end wafers.

How EMIB-T Could Accelerate Intel Foundry Revenue Growth 

From Intel’s perspective, the multi-billion-dollar opportunities it attributes to EMIB-T could clearly have a huge impact on its external foundry sales, which are currently at just a $1.17 billion run rate. In terms of total revenue, the impact may not be huge but could still be meaningful. As an illustration, achieving $3 billion in annual EMIB-T revenue would be equal to 5.3% of Intel’s LTM sales. However, it is worth noting that from Q2 2024 to Q2 2026, Intel’s LTM revenue increased by only 3.5%. In turn, EMIB-T could also provide a growth lever during a period of growth stagnation.

Notably, TSMC said that advanced packaging represented just over 10% of its total revenue in Q3 2025. Holding this figure steady, and using TSMC’s expected total revenue of $166 billion in 2026, the company could generate advanced packaging revenue of over $16.6 billion. Considering this, a $3 billion advanced packaging opportunity for Intel over the coming years may not be unrealistic.

Intel’s Q2 Earnings: External Foundry Sales Rise Sharply Versus Q1 

Intel had a strong Q1, seeing revenues rise 25%.4 YoY, its highest quarterly growth rate in well over a decade. Notably, Intel Foundry revenue rose 31% YoY to $5.8 billion, but this demand still overwhelmingly came from its own design business. External foundry sales of $293 million accounted for just 5% of overall foundry sales.

Nonetheless, it was a positive to see external foundry sales rise 68.3% QoQ compared to $174 million in Q1. The company also noted that customer interest in EMIB-T continues to be “very high”, and that its EMIB-T backlog continues to grow, but did not provide concrete metrics.

Related to this, Intel said it was “focused on ramping the technology into high volume and high quality to support customer ramps in 2027.” Intel reiterated its view that advanced packaging was one of several “multibillion-dollar annual revenue opportunities for us in the not-too-distant future.” Overall, the company made meaningful progress in growing its external foundry business, but did not disclose any large customer agreements.

Conclusion

The investor takeaway is that Intel’s most credible near-term foundry opportunity may be advanced packaging rather than leading-edge wafer manufacturing.

In an unexpected twist, TSMC and Intel may be more complementary than competitive.  EMIB-T could allow Intel to absorb overflow packaging demand while TSMC continues producing the underlying compute dies, to where the companies work together to increase AI accelerator supply.

Advanced packaging is only one of the bottlenecks shaping the next phase of the AI trade. The I/O Fund just released our new 90-page Top 20 AI Stocks for Q3 2026 report, where we identify the companies best positioned across AI accelerators, memory, networking, optics, energy infrastructure and other critical layers of the AI stack.

We currently have five positions up more than 100% year to date and ten positions up more than 50%, with many held at high allocations. By comparison, the Nasdaq-100 is up just 13% YTD. 

Access the Top 20 AI Stocks report now to find out which stocks we believe are positioned to lead in the second half of 2026. Learn more here.

Please note: The I/O Fund conducts research and draws conclusions for the company’s portfolio. We then share that information with our readers and offer real-time trade notifications. This is not a guarantee of a stock’s performance and it is not financial advice. Please consult your personal financial advisor before buying any stock in the companies mentioned in this analysis.   

Leo Miller, AI and Semiconductor Investment Writer at I/O Fund, contributed to this analysis.

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